Published by: Nuru
Published date: 22 Jun 2021
Asynchronous decade counters are the counters having ten states in its sequence. The binary ripple counters as studied previously have 2n states. But as per our need, the states can be maintained. This is called the truncated sequence. It is achieved by forcing the counter to recycle before going to the normal states.
The circuit below shows the decade counter i.e. mod 10 counter.
If we are using the Decade counter, then the sequences of state should be like follows:
A decade counter follows a sequence of ten states and returns to 0 after the count of 9. Such a counter must have at least four flip-flops to represent each decimal digit since a decimal digit is represented by a binary code with at least four bits.
The four outputs in the figure are represented by Q. There is a triggering of the flip-flop in the negative edge. Signals that affect the flip-flop transition depend upon the order in which they change from 1 to 0.
Once all get started, the counter counts ten and all the flip-flops are cleared. It should be remembered that only Q A and Q C are used to decode the count of ten. This action is numbered as partial coding. At this time, none of the other states i.e. 0 to 9 have both Q A and Q C high at the same time.
Mod Twelve Asynchronous CounterIn the count sequence, we see that there is a glitch on the Q B waveform. The reason is that Q B must go high first before the count of ten can be decoded. Due to this, the counter comes in 1010 state for some time before resetting. Hence, it produces glitch on the Q B. This results in the clearing line, and then again the counter resets to 0000.
There is the implementation of mod 12 ripple counters with a binary sequence from 0000 to 1011. The following circuit is made using the T flip-flop.
The working of this counter is as same as that of the asynchronous decade counter.