Interrupt Handling with 8085

Interrupt handling is a key function in real-time software and comprises interrupts and their handlers. Only those physical interrupts which of high enough priority can be centered into the system interrupt table. The software assigns each interrupt to a handler in the interrupt table. An interrupt handler is just a routine containing a sequence of operations.

Interrupts are the signals generated by the external devices to request the microprocessor to perform a task. There are 5 interrupt signals, i.e. TRAP, RST 7.5, RST 6.5, RST 5.5, and INTR. Vector interrupt − In this type of interrupt, the interrupt address is known to the processor. Interrupt handling is a challenge as interrupts force the CPU to enter supervisory mode—hence interrupt routines cannot be implemented completely in userspace.

Interrupt Processing in 8085

•  Interrupt signals send by an external device to the processor, to request the processor to perform a particular task or work.
•  Mainly in the microprocessor-based system, the interrupts are used for data transfer between the peripheral and the microprocessor.
•  The processor will check the interrupts always at the 2nd T-state of the last machine cycle.
•  If there is any interrupt it accepts the interrupt and sends the INTA (active low) signal to the peripheral.
•  The vectored address of a particular interrupt is stored in a program counter.
•  The processor executes an interrupt service routine (ISR) addressed in the program counter.

Handling interrupts is at the heart of a real-time and embedded control system. The actual process of determining a good handling method can be complicated, since numerous actions are occurring simultaneously at a single point, and have to be handled rapidly and efficiently. This subsection will provide a practical guide to designing an interrupt handler and will discuss the various trade-offs between the different methods.