Input/Output Address Decoding

Input/Output Address decoding refers to the way a computer system decodes the addresses on the address bus to select memory locations in one or more memory or peripheral devices. The 68000's 23-bit address bus permits 223 16-bit words to be uniquely addressed. The CPU provides the address of the data desired, but it is the job of the decoding circuitry to locate the selected memory block. To explore the concept of decoding circuitry, we look at various methods used in decoding the addresses. In this discussion, we use SRAM or ROM for the sake of simplicity.

In digital electronics, an address decoder is a binary decoder that has two or more inputs for address bits and one or more outputs for device selection signals. When the address for a particular device appears on the address inputs, the decoder asserts the selection output for that device. A dedicated, single-output may be incorporated into each device on an address bus, or a single may serve multiple devices.

I/O PORT ADDRESS DECODING

• Very similar to memory address decoding, especially for memory-mapped I/O devices.
• The difference between memory decoding and isolated I/O decoding is the number of address pins connected to the decoder.
• In the personal computer system, we always decode all 16 bits of the I/O port address.