8085 Microprocessor Architecture and Operations

Intel 8086 is a widely used 16-bit microprocessor. The 8086 can directly address 1MB of memory. The internal architecture of the 8086 microprocessor is an example of register-based. Microprocessor and uses segmented memory. It pre-fetches up to 6 instruction bytes from the memory and queues them in order to speed up the instruction execution.

It has a data bus of width 16 bits and an address bus of width 20 bits. So it always accesses a 16-bit word to or from memory. The 8086 microprocessor is divided internally into two separate units which are Bus
interface unit (BIU) and the execution unit (EU). The BIU fetches instructions, reads operands, and writes results. The EU executes instructions that have already been fetched by BIU so that instructions
fetch overlaps with execution. A 16 bit ALU in the EU maintains the MP status and control flags, manipulates general register and instruction operands.

Bus Interface Unit(BIU) and its Components
The BIU sends out addresses, fetches instructions from memory reads data from memory or ports and writes data to memory or ports. So it handles all transfers of data and addresses on the buses for the EU. It has the main 2 parts instruction queue and segment registers. The BIU can store up to 6 bytes of instructions with FIFO (First In First Out) manner in a register set called a queue. When the EU is ready for the next instruction, it simply reads the instruction from the queue in the BIU. This is done in order to speed up program execution by overlapping instruction fetch with execution. This mechanism is known as pipelining. The BIU contains a dedicated address, which is used to produce a 20-bit address. Four segment registers in the BIU are used to hold the upper 16 bits of the starting address of four memory segments that the 8086 is working at a particular time. These are the code segment, the data segment, the stack segment, and the extra segment. The 8086’s 1 MB memory is divided into segments up to 64KB each.